A.2.2. KBDTEST2 [4] (+0x24)

This write-only test register provides control of the clock and other signals. Table A-3: KBDTEST2 register details shows the bit details of the register.

Table A.3. KBDTEST2 register details

3TICBnRESWhen HIGH, this will cause all of the peripherals normal mode logic/registers to be reset, in other words, EXCLUDING the test registers.
2RKCRegistered Keyboard Clock bit. Used to drive the Keyboard Clock path internally.
1RKDRegistered Keyboard Data bit. Used in test mode to drive the Keyboard Data path internally.
0SELMux Select line for use in test mode. When set to 1, this bit selects the RKC and RKD bits for use internally. Otherwise the normal block inputs are used.
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