4.3.2. KBDSTAT [8] (+0x04)

This read-only register provides status information such as the busy state of the FSM, parity of last received data, and so on. Table 4.3: KBDSTAT register details shows the bit details of the register.

Table 4.3. KBDSTAT register details


TX register. empty:

0 = not ready

1 = enable, ready to transmit

6TXBTX Busy: 1 = currently sending data
5RXFRX Full: 1 = Rx. register full, ready to be read
4RXBRX Busy: 1 = currently receiving data
3ENAEnable bit: 1 = Function enable
2RXPParity bit indication for last received data byte (odd parity)
1KBDValue on KDATA pin (after synchronizing)
0KBCValue on KCLK pin (after synchronizing and sampling by Div8 clock)
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