4.3.5. GIRDATAR - Generic IR Data Register [18] (+0x40 – 0x7C)

This register is used to transfer data to and from the module. A write operation to this location results in a write to the TX FIFO. A read causes data to be read from the RX FIFO. The register spans 16 words of address so that the multiple load and store ARM instructions LDM and STM can be used.

Table 4.6. GIRDATAR bit functions

BitNameFunction
17RXDataAvail

This bit is undefined in write mode.In read mode, this bit reports whether the RX FIFO contains any more data after the current read:

1: more data to be read.

0: FIFO may be empty after the current read operation.

16txval/rxval

In write mode, this bit gives the polarity of the bit to be transmitted.

In read mode, this bit shows the level of the received bit.

15:0data

In write mode, these bits give the required duration of the transmitted bit. If modulation is enabled, a ‘1’ will be represented by a burst of carrier for the specified time. Otherwise, the output will be a logic level for the specified time.

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