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The PrimeCell UART complies with the AMBA Specification (Rev 2.0) onwards.
The fundamental differences from the AMBA Specification Revision D are:
the timing of the strobe signal PSTB compared with the enable signal PENABLE
the time at which read data is sampled
a separate unidirectional read data bus PRDATA, and unidirectional write bus PWDATA (instead of the bidirectional data bus PD)
the address bus is named PADDR (instead of PA).
This document assumes little-endian memory organization, where bytes of increasing significance are stored in increasing addresses in memory, and hence low-order bytes are transferred on the low-order bits of the data bus. Options for a big-endian system are described in the ARM PrimeCell UART (PL010) Integration Manual.