ARM PrimeCell PS2 Keyboard/Mouse Interface (PL050) TechnicalReference Manual

Table of Contents

About this manual
Intended audience
Using this manual
Additional reading
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1. Introduction
1.1. About the ARM PrimeCell PS2 Keyboard/MouseInterface (PL050)
1.1.1. Features of the PrimeCell KMI
1.2. AMBA compatibility
2. Functional Overview
2.1. ARM PrimeCell PS2 Keyboard/Mouse Interface(PL050) overview
2.2. PrimeCell KMI functional description
2.2.1. AMBA APB interface and register block
2.2.2. Transmit block
2.2.3. Receive block
2.2.4. Controller block
2.2.5. Timer/clock divider blocks
2.2.6. Synchronization logic
2.2.7. Test registers and logic
2.3. PrimeCell KMI operation
2.3.1. Interface reset
2.3.2. Clock signals
2.3.3. Keyboard clock and data signals
2.3.4. Keyboard/mouse data output
2.3.5. Keyboard data input
2.3.6. Timing requirements
3. Programmer’s Model
3.1. About the programmer’s model
3.2. Summary of PrimeCell KMI registers
3.3. Register descriptions
3.3.1. KMICR: [6] (+ 0x00)
3.3.2. KMISTAT: [7]( + 0x04)
3.3.3. KMIDATA: [8] (+ 0x08)
3.3.4. KMICLKDIV: [4] (+ 0x0C)
3.3.5. KMIIR: [2] (+ 0x10)
3.4. Interrupts
3.4.1. Interrupt generation logic
4. Programmer’s Model for Test
4.1. PrimeCell KMI test harness overview
4.2. Scan testing
4.3. Test registers
4.3.1. KMITCER [0] (+0x40–0x7c)
4.3.2. KMITCR [5] (+0x80)
4.3.3. KMITMR [4] (+0x84)
4.3.4. KMITISR [2] (+0x88)
4.3.5. KMITOCR [3] (+0x8c)
4.3.6. KMISTG1 [6] (+0x90)
4.3.7. KMISTG2 [5] (+0x94)
4.3.8. KMISTG3 [8] (+0x98)
4.3.9. KMISTATE [4] (+0x9c)
A. Signal Descriptions
A.1. AMBA APB signals
A.2. On-chip signals
A.3. Signals to pads

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Product Status

The information in this document is final, that is for a developedproduct.

Revision History
Revision A January1999 First release
Revision B April1999 Second release
Revision C May1999 Third release
Copyright © 1999 ARM Limited. All rights reserved. ARM DDI 0143C