4.3.3. SCITISR:[4] (+0x88)

SCITISR is the test input stimulus register and provides direct control of the SCI non-AMBA primary inputs. Table 4.4 shows bit assignments for SCITISR.

Table 4.4. SCITISR register read/writebits

BitNameTypeDescription
3SCIDEACREQRead/writeProgrammable test stimulus to primary input SCIDEACREQ.
2SCIDETECTRead/writeProgrammable test stimulus to primary input SCIDETECT.
1SCIDATAINRead/writeProgrammable test stimulus to primary input SCIDATAIN.
0SCICLKINRead/writeProgrammable test stimulus to primary input SCICLKIN.
Copyright © 1999 ARM Limited. All rights reserved.ARM DDI 0148B
Non-Confidential