3.3.12. SCIISTAT: [10] (+0x2c)

SCIISTAT is the ICC status register and provides direct access to Smart Card signals. It is only required if a non-EMV-compliant configuration is used. The status register is updated automatically during activation, deactivation and warm reset events. Table 3.14 shows bit assignments for SCIISTAT.

Note

The SCI does not have a separate bit to distinguish between EMV and non-EMV compliant cards. It is the responsibility of the software to follow certain sequences in either case to ensure correct and consistent behavior. The software should not write to the STARTUP bit in case it is dealing with a non-EMV compliant card. It should set the STARTUP bit in the case of EMV compliant cards. If the STARTUP bit has been written to – indicating an EMV compliant card – the software should not write to the Smart Card Status register. If the STARTUP bit has not been written to – indicating a non-EMV compliant card – the activation sequence should be performed by explicit writes to the relevant bits in this register. Deactivation is done ONLY through internal hardware in both EMV and non-EMV configurations. Software should not write to this register during card validation via the hardware debounce mechanism. Writes to this register are ignored during deactivation.

Table 3.14. SCIISTAT register read/write bits

Bits

Name

Type

Function

9

CARDPRESENT

Read

1 if Smart Card is present.

8

nSCIDATAEN

Read

Tristate control for external off-chip buffer for data.

7

nSCIDATAOUTEN

Read

Tristate output buffer control for data.

6

SCICLKOUT

Read

Smart Card clock output.

5

nSCICLKEN

Read

Tristate control for external off-chip buffer for clock.

4

nSCICLKOUTEN

Read

Tristate output buffer control for clock.

3

DATAEN

Read/write

Enable Smart Card data.

0 forces the Smart Card data LOW.

2

CLKEN

Read/write

Enable Smart Card clock.

0 forces the Smart Card clock LOW.

1

CRESET

Read/write

Controls Smart Card reset signal.

0

POWER

Read/write

Controls Smart Card VCC.

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