3.3.27. SCIRAWSTAT: [2] (+0x68)

SCIRAWSTAT is the raw input/output and clock status register and provides read access to the raw status of the Smart Card input/output and clock signals. Table 3.30 shows bit assignments for SCIRAWSTAT.

Table 3.30. SCIRAWSTAT register read bits

Bits

Name

Type

Function

1

RCLK

Read

Raw value of the clock.

0

RDATA

Read

Raw value of the input/output line.

Note

In non-EMV mode of operation, the incoming bit stream from the card should be read from the SCIRAWSTAT register. The received data will not be available in the receive FIFO.

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