3.3.3. SCICR1: [6] (+0x08)

SCICR1 is control register 1. Table 3.4 shows bit assignments for SCICR1.

Table 3.4. SCICR1 register read/write bits

Bits

Name

Type

Function

5

EXDBNCE

Read/write

External debounce.

0 = Use the whole of the internal debounce timer.

1 = Bypass the non programmable section of the internal debounce timer.

4

BGTEN

Read/write

Block guard timer enable.

0 = Disable.

1 = Enable.

3

CLKZ1

Read/write

SCICLK output configuration.

0 = SCICLK configured as buffer output.

1 = SCICLK configured as pulled down (open drain).

2

MODE

Read/write

Interface direction of communication control.

0 = Receive.

1 = Transmit.

1

BLKEN

Read/write

Block timeout enable.

0 = Disable.

1 = Enable.

0

ATRDEN

Read/write

ATR duration timeout enable.

0 = Disable.

1 = Enable.

CLKZ1

Used to configure the SCICLK output pad. If an external pull-up resistor is connected to the Smart Card clock signal, as is the case for synchronous card systems (where both the terminal and the card can pull the clock line LOW), the SCICLK output should be configured as pull-down only.

EXDBNCE

Used to bypass the non programmable portion of the debounce timer, allowing a zero-debounce time by setting the programmable portion of the timer to 0.

Copyright © 1999 ARM Limited. All rights reserved.ARM DDI 0148B
Non-Confidential