You can place the ARM920T into a low power state by executing the CP15 MCR wait for interrupt:

MCR	p15,0,Rd,c7,c0,4

Execution of this MCR causes the write buffer to drain and the ARM920T is put into a state where it will resume execution of code after either an interrupt or a debug request. When the interrupt occurs the MCR instruction completes and the FIQ or IRQ handler is entered as normal. The return link in R14_fiq or R14_irq contains the address of the MCR instruction plus 8, so that the normal instruction used for interrupt return returns to the instruction following the MCR:

SUBS	pc,r14,#4