CDPs normally execute in a single cycle.
Like all other instructions, nCPMREQ is driven
LOW to signal when an instruction is entering the Decode and then
the Execute stage of the pipeline:
if the instruction is to be executed,
the CPPASS signal is driven HIGH
during phase 2 of the Execute stage
if the coprocessor can execute the instruction immediately
it drives CHSDE[1:0] with LAST
if the instruction requires a busy-wait cycle, the
coprocessor drives CHSDE[1:0] with
WAIT and then CHSEX[1:0] with
LAST.
Figure 7.5 shows
a CDP that is canceled due to the previous instruction causing
a Data Abort. The CDP instruction enters the
Execute stage of the pipeline, and is signaled to execute by CPPASS. In the following phase CPLATECANCEL is asserted. This causes
the coprocessor to terminate execution of the CDP instruction,
and for it to cause no state changes to the coprocessor.
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