4.2.3. Partition attributes

Each region has a number of attributes associated with it. These control how a memory access is performed when the processor core issues an address that falls within a given region. The attributes are:

You specify this information by programming CP15 registers 2, 3, and 5 (see Chapter 2 Programmer’s Model). If an access fails its protection check (for example, if a User mode application attempts to access a Privileged mode access only region), a memory abort occurs. The processor enters the abort exception mode, branching to the Data Abort or Prefetch Abort vector accordingly.

The cachable and bufferable bits in CP15 registers 2 and 3 are used together to select one of four cache and write buffer configurations. These are described in Chapter 6 Bus Interface Unit and Write Buffer, and specifically in The write buffer.

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