5.2.4. Enabling the D-SRAM

You can enable the D-SRAM by setting bit 16 of the CP15 control register. See CP15 register map summary for details of how to read and write this register. When you have enabled the D-SRAM, see Register 9, Tightly-coupled memory region registers, all future read and write accesses to the D-SRAM address space cause the D-SRAM to be accessed.

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