6.2.3. Burst sizes

The ARM946E-S supports the burst types listed in Table 6.1.

Table 6.1. Supported burst types

Burst type

HBURST

encoding

Use

SINGLE

000

Single writes (STR/STRH/STRB)

Uncached single reads

Uncached instruction fetches

INCR

001

Store multiple (STM)

Uncached burst reads (LDM)

INCR4

011

Dirty half-cache line write back

INCR8

101

Dirty cache line write back

Cache linefetches

Incrementing bursts have an address increment of four (that is, word increment).

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