6.2.6. Uncached transfers

If a memory request is made to an uncachable region, or the ARM946E-S cache is not enabled, the memory requests are serviced by the AHB interface. Sequential instruction fetches are treated as nonsequential reads.

Figure 6.3 shows uncached instruction fetches. Nonsequential uncached data operations exhibit similar bus timings.

Figure 6.3. Nonsequential uncached accesses

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