8.1.1. Debug clocks

You must synchronize the system and test clocks externally to the ARM946E-S macrocell. The ARM Multi-ICE debug agent directly supports one or more cores within an ASIC design. To synchronize off-chip debug clocking with the ARM946E‑S macrocell you must use a three-stage synchronizer. The off-chip device (for example, Multi-ICE) issues a TCK signal, and waits for the RTCK (Returned TCK) signal to come back. Synchronization is maintained because the off-chip device does not progress to the next TCK until after RTCK is received.

Figure 8.1 shows this synchronization.

Figure 8.1. Clock synchronization

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