8.5.2. Step 2

Reading individual entries using the CP15 scan chain can be useful where an entry has been marked as dirty, because this indicates that there is an inconsistency between the cache contents and main memory.

For the DCache, the debugger can execute system speed accesses that hit in the cache and, therefore, return the cache contents. Writes to the DCache from the processor core by this method result in the dirty bits being set for write-back regions, and main memory is updated for write-through regions.

If the CP15 scan chain is used for updating the DCache, only the cache contents are updated. Writes are not made to main memory. For this method you must first program the index/set register with the required cache index, set, and word values. The format of the cache index register is shown in Figure 8.6.

Figure 8.6. Cache index register format


Although 27 bits are specified for the TAG address, only those bits required for the TAG implemented are used.

The cache index register is also used for writing to the instruction cache. This is useful for setting software breakpoints within code already in the cache. This means that you do not have to flush the cache and reload the entry.


There is no mechanism for detecting that the ICache has been updated in this way. The debugger must restore the original cache contents after executing the breakpoint.

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