8.6.3. Watchpoints

Entry into debug state following a watchpointed memory access is imprecise. This is necessary because of the nature of the pipeline.

You can build external logic, such as external watchpoint comparators, to extend the functionality of the EmbeddedICE-RT logic. The output of the external logic must be applied to the DBGDEWPT input. This signal is ORed with the internally-generated Watchpoint signal before being applied to the ARM9E‑S core control logic. The timing of the input makes it unlikely that data-dependent external watchpoints are possible.

After a watchpointed access, the next instruction in the processor pipeline is always allowed to complete execution. Where this instruction is a single‑cycle data‑processing instruction, entry into debug state is delayed for one cycle while the instruction completes. The timing of debug entry following a watchpointed load in this case is shown in Figure 8.8.

Figure 8.8. Watchpoint entry with data processing instruction

Note

Although instruction 5 enters the Execute stage, it is not executed, and there is no state update as a result of this instruction. When the debugging session is complete, normal continuation involves a return to instruction 5, the next instruction in the code sequence that has not yet been executed.

The instruction following the instruction that generated the watchpoint might modify the Program Counter (PC). If this happens, you cannot determine the instruction that caused the watchpoint. However, you can always restart the processor. A timing diagram showing debug entry after a watchpoint where the next instruction is a branch is shown in Figure 8.9.

When the processor has entered debug state, you can interrogate the ARM9E‑S core to determine its state. In the case of a watchpoint, the PC contains a value that is five instructions on from the address of the next instruction to be executed. Therefore, if on entry to debug state, in ARM state, the instruction SUB PC, PC, #20 is scanned in and the processor restarted, execution flow returns to the next instruction in the code sequence.

Figure 8.9. Watchpoint entry with branch

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