4.2. Memory regions

You can partition the address space into a maximum of eight regions. Each region is specified by the following:

The ARM architecture uses constants known as inline literals to perform address calculations. These constants are automatically generated by the assembler and compiler and are stored inline with the instruction code. To ensure correct operation, you must define an area of memory, from where code is to be executed, that allows both data and instruction accesses.

The base address and size properties are programmed using CP15 register 6. The format for this is shown in Table 4.1.

Table 4.1. Protection register format

Register bit

Function

31:12

Region base address

11:6

Unused

5:1

Region size

0

Region enable

Reset to disable (0).

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