9.1. About the ETM interface

The ARM946E-S supports the connection of an optional external Embedded Trace Macrocell (ETM) to provide real-time tracing of ARM946E-S instructions and data in an embedded system.

The ETM consists of two parts:

A trace port

A trace protocol has been developed to provide a real-time trace capability for processor cores that are deeply embedded in much larger ASIC designs. As the ASIC typically includes significant amounts of on-chip memory, you cannot determine how the processor core is operating simply by observing the pins of the ASIC. A trace port is required to confirm the performance of the processor in operational use.

Triggering facilities

An extensible specification exists, allowing you to specify the exact set of trigger resources required for a particular application. Resources include address and data comparators, counters, and sequencers.

The ETM compresses the trace information and exports it through the trace port. An external Trace Port Analyzer (TPA) is used to capture the trace information.

The ETM interface is primarily one way. To provide code tracing, the ETM block must be able to monitor various ARM9E-S inputs and outputs. The required ARM9E-S inputs and outputs are collected and driven out from the ARM946E-S as the ETM interface.

The ETM interface outputs are pipelined by a single clock cycle to provide early output timing and to isolate any ETM input load from the critical ARM946E-S signals. The latency of the pipelined outputs does not affect ETM trace behavior, because all outputs are delayed by the same amount.

Figure 9.1 shows the ARM946E-S ETM interface.

Figure 9.1. ARM946E-S ETM interface

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