2.3.4. Register 0, Tightly-coupled memory size register

This is a read-only register that returns the size of the tightly-coupled instruction and data RAMs included within the ARM946E-S.

The tightly-coupled memory size register is accessed by reading CP15 register 0 with the opcode_2 field set to 2. For example:

MRC p15, 0, rd, c0, c0, 2; returns tightly-coupled memory size register

The register contains information about the size of the tightly-coupled memories. The format of the register is shown in Table 2.7.

Table 2.7. Tightly-coupled memory size register

Register bit

Meaning

Value

31:22

Reserved

b0000000000

21:18

Data RAM size

Implementation-specific

17:15

Reserved

b000

14

Data RAM absent

Implementation-specific

13:10

Reserved

b0000

9:6

Instruction RAM size

Implementation-specific

5:3

Reserved

b000

2

Instruction RAM absent

Implementation-specific

1:0

Reserved

b00

The memory size parameters are implementation-specific. The values used are generated within the memory blocks. This allows the memory size to be changed without having to re-synthesize the full design. Bits [21:18] define the data RAM size. Bits [9:6] define the instruction RAM size. Table 2.8 shows the memory size field definitions for instruction and data RAM memory sizes.

Table 2.8. Memory size field

Bits [21:8] and bits [9:6]

Tightly-coupled RAM size

b0000

0KB

b0011

4KB

b0100

8KB

b0101

16KB

b0110

32KB

b0111

64KB

b1000

128KB

b1001

256KB

b1010

512KB

b1011

1MB

If the tightly-coupled memory is absent, then the relevant RAM absent bit (bit 14 or bit 2) in the tightly-coupled memory register should be one. If tightly-coupled memory is present within the design, the relevant RAM absent bit should be zero.

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