8.5. Debug access to the caches

It is desirable for the debugger to examine the contents of the instruction and data caches during debug operations. This is achieved in two steps.

  1. The debugger determines if valid addresses are stored in the cache and forms TAG addresses from the TAG contents and the TAG index.

  2. The debugger uses the generated addresses to either access main memory, or to read individual entries using the CP15 scan chain.

Copyright © 2000 ARM Limited. All rights reserved.ARM DDI 0155A