2.3.12. Register 9, Tightly-coupled memory region registers

These registers allow you to modify the visible size of the tightly-coupled memories.

You can either increase or decrease the size of the tightly-coupled memories from the physical sizes described in register 0 (see Register 0, Tightly-coupled memory size register). Increasing the visible size of the tightly-coupled memories above the physical size allows aliasing within the tightly-coupled memory space. This feature is useful for debugging multitasking systems.

There is a memory region register for each of the tightly-coupled memories:

MRC p15, 0, rd, c9, c1, 0; read data tightly-coupled memory
MCR p15, 0, rd, c9, c1, 0; write data tightly-coupled memory
MRC p15, 0, rd, c9, c1, 1; read instruction tightly-coupled memory
MCR p15, 0, rd, c9, c1, 1; write instruction tightly-coupled memory

Each tightly-coupled memory region register has the format shown in Table 2.22.

Table 2.22. Protection region/base size register format

Register bit

Function

31:12

Region base

5:1

Area size

Minimum size = 4KB

Maximum size = 4GB

(See Table 2.20).

0

SBZ

For a given number of aliases for the physical memory size, the following function can be used:

Area size = Physical size + N

where 2N is the required number of aliases.

The encodings for the supported tightly-coupled memory area sizes are shown in Table 2.23.

Table 2.23. Tightly-coupled memory area size encoding

Bit encoding

Tightly-coupled memory area size

b00011

4KB

b00100

8KB

b00101

16KB

b00110

32KB

b00111

64KB

b01000

128KB

b01001

256KB

b01010

512KB

b01011

1MB

b01100

2MB

b01101

4MB

b01110

8MB

b01111

16MB

b10000

32MB

b10001

64MB

b10010

128MB

b10011

256MB

b10100

512MB

b10101

1GB

b10110

2GB

b10111

4GB

You must align the region base to an area size boundary, where the area size is defined in its respective protection region register. The behavior is unpredictable if this is not done.

The instruction tightly-coupled memory base address is fixed at 0x00000. For the instruction tightly-coupled memory, the region base returns the value 0x00000 when read.

When writing to the instruction tightly-coupled memory, you must set the region base to 0x00000. Writes with the region base set to any other value are unpredictable.

At reset, the region base for both the instruction and data tightly-coupled memory region registers are cleared to 0x00000.

At reset, the area size for the instruction and data tightly-coupled memory region registers takes the value defined in the tightly-coupled memory size register (see Register 0, Tightly-coupled memory size register).

You must program the data tightly-coupled memory region registers before you set the data RAM enable bit (bit 16) in register 1 (see Register 1, Control register). If this is not done, the data tightly-coupled memory resides at the same location resulting in unpredictable behavior.

Note

If the data tightly-coupled memory is located at the same address as the instruction tightly-coupled memory, then the instruction memory takes precedence for data accesses.

If the data tightly-coupled memory is located at the same address as the instruction tightly-coupled memory, and the instruction RAM is in load mode, data accesses read from the data RAM and write to the instruction RAM.

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