3.4. Cache lockdown

To provide predictable code behavior in embedded systems, a mechanism is provided for locking code into the ICache and DCache respectively. For example, you can use this feature to hold high-priority interrupt routines where there is a hard real-time constraint, or to hold the coefficients of a DSP filter routine in order to reduce external bus traffic.

You can lock down a region of the ICache or DCache by executing a short software routine, taking note of these requirements:

You can carry out lockdown in the DCache using CP15 register 9. ICache lockdown uses both CP15 registers 7 and 9.

As described in Cache architecture, the ARM946E-S ICache and DCache each comprise four segments. You can perform lockdown with a granularity of one segment. The smallest space that you can lock down is one segment (one quarter of cache size). Lockdown starts at segment zero, and can continue until three of the four segments are locked.

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