ETM9™ Technical Reference Manual 1.2.2. Pin names

1.2.2. Pin names

Table 1.2 shows the pin names on the different revisions of ETM9.

Table 1.2. ETM9 pin names

Type	ETM9 (Rev 0) signal	ETM9 (Rev 0a) signal	ETM9 (Rev 1) signal	ETM9 (Rev 2) and ETM9 (Rev 2a) signal ETM9 (Rev 2p2) signal
Input	TCK	TCK	TCK	TCK
Input	TCKEN	TCKEN	TCKEN	TCKEN
Input	nTRST	nTRST	nTRST	nTRST
Input	TDI	TDI	TDI	TDI
Input	TMS	TMS	TMS	TMS
Input	ARMTDO	ARMTDO	ARMTDO	ARMTDO
Input	nRESET	nRESET	nRESET	nRESET
Input	BIGEND	BIGEND	BIGEND	BIGEND
Input	GCLK	CLK	CLK	CLK
Input	HIVECS	HIVECS	HIVECS	HIVECS
Input	nWAIT	CLKEN	CLKEN	CLKEN
Input	IA[31:1]	IA[31:1]	IA[31:1]	IA[31:0]
Input	InMREQ	InMREQ	InMREQ	InMREQ
Input	ISEQ	ISEQ	ISEQ	ISEQ
Input	ITBIT	ITBIT	ITBIT	ITBIT
Input	-	-	-	IJBIT
Input	IABORT	-	-	-
Input	ID31To24[31:24]	ID31To25[31:25]	ID31To25[31:25]	ID31To25[31:25]
Input	ID15To8[15:8]	ID15To11[15:11]	ID15To11[15:11]	ID15To11[15:11]
Input	DA[31:0]	DA[31:0]	DA[31:0]	DA[31:0]
Input	DD[31:0]	DD[31:0]	DD[31:0]	DD[31:0]
Input	DMAS[1:0]	DMAS[1:0]	DMAS[1:0]	DMAS[1:0]
Input	DMORE	DMORE	-	-
Input	DnMREQ	DnMREQ	DnMREQ	DnMREQ
Input	DnRW	DnRW	DnRW	DnRW
Input	DSEQ	DSEQ	DSEQ	DSEQ
Input	CHSD[1:0]	CHSD[1:0]	CHSD[1:0]	CHSD[1:0]
Input	CHSE[1:0]	CHSE[1:0]	CHSE[1:0]	CHSE[1:0]
Input	LATECANCEL	LATECANCEL	LATECANCEL	LATECANCEL
Input	PASS	PASS	PASS	PASS
Input	DABORT	DABORT	DABORT	DABORT
Input	DDIN[31:0]	DDIN[31:0]	DDIN[31:0]	DDIN[31:0]
Input	DBGACK	DBGACK	DBGACK	DBGACK
Input	INSTREXEC	INSTREXEC	INSTREXEC	INSTREXEC
Input	-	-	INSTRVALID	INSTRVALID
Input	-	-	-	ZIFIRST
Input	-	-	-	ZILAST
Memory Map Decoder signals
Input	Mmd[16:1]	MMDIN[x:0] x = 15 for large configuration x = 7 for mediumplus configuration x = 7 for medium configuration x = 3 for small configuration.	MMDIN[x:0] x = 15 for large configuration x = 7 for mediumplus configuration x = 7 for medium configuration x = 3 for small configuration.	MMDIN[x:0] x = 15 for large configuration x = 7 for mediumplus configuration x = 7 for medium configuration x = 3 for small configuration.
Output	MemMapRegO[7:0]	MMDCTRL[7:0]	MMDCTRL[7:0]	MMDCTRL[7:0]
Output	IAFeSetupO[31:1]	MMDIA[31:1]	MMDIA[31:1]	MMDIA[31:1]
Output	ITBITFeSetupO	MMDITBIT	MMDITBIT	MMDITBIT
Output	InMREQFeSetupO	MMDInMREQ	MMDInMREQ	MMDInMREQ
Output	DAMeSetupO[31:0]	MMDDA[31:0]	MMDDA[31:0]	MMDDA[31:0]
Output	DnRWMeSetupO	MMDDnRW	MMDDnRW	MMDDnRW
Output	DnMREQMeSetupO	MMDDnMREQ	MMDDnMREQ	MMDDnMREQ
EmbeddedICE signals
Input	EmbdIce1	RANGEOUT[0]	RANGEOUT[0]	RANGEOUT[0]
Input	EmbdIce2	RANGEOUT[1]	RANGEOUT[1]	RANGEOUT[1]
External input signals
Input	ExtIn[4:1]	EXTIN[x:0] x = 3 for large configuration x = 3 for mediumplus configuration x = 3 for medium configuration x = 1 for small configuration.	EXTIN[x:0] x = 3 for large configuration x = 3 for mediumplus configuration x = 3 for medium configuration x = 1 for small configuration.	EXTIN[x:0] x = 3 for large configuration x = 3 for mediumplus configuration x = 3 for medium configuration x = 1 for small configuration.
Miscellaneous input signals
Input	-	-	SYSOPT[7:0]	SYSOPT[8:0]
Input	-	-	PROCID[31:0]	PROCID[31:0]
Input	-	-	PROCIDWR	PROCIDWR
External output signals
Output	ExtOut[4:1]	EXTOUT[3:0]	EXTOUT[3:0]	EXTOUT[3:0]
Output	DBGRQ	DBGRQ	DBGRQ	DBGRQ
Output	TDO	TDO	TDO	TDO
Output	EtmPwrDwn	PWRDOWN	PWRDOWN	PWRDOWN
Output	ETMEN	ETMEN	ETMEN	ETMEN
Output	TRACECLK	-	-	-
Output	PIPESTAT[2:0]	PIPESTAT[2:0]	PIPESTAT[2:0]	PIPESTAT[2:0]
Output	TRACEPKT[15:0]	TRACEPKT[15:0]	TRACEPKT[15:0]	TRACEPKT[15:0]
Output	TRACESYNC	TRACESYNC	TRACESYNC	TRACESYNC
Output	ETMFIFOFULL	FIFOFULL	FIFOFULL	FIFOFULL
Output	-	-	PORTMODE[1:0]	PORTMODE[1:0]
Output	ETMPORTSIZE[2:0]	PORTSIZE[2:0]	PORTSIZE[2:0]	PORTSIZE[2:0]
Output	-	CLKDIVTWOEN	CLKDIVTWOEN	CLKDIVTWOEN

Note

The ETM9 r2p2 macrocell can implement WSI, WSO, MUXINSEL, MUXOUTSEL, WSEI, WSEO, WEDGE, and SCANMODE. These are DFT signals and their use is implementation defined. They are not directly tested by the test programs, but must be tested if you intend to use these connections. See Table 5.1.

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