5.1. About ASIC trace validation

You can use the tests described in this chapter to generate chip-level vectors for production test. ARM recommends that you carry out the following sequence of steps to ensure that your ASIC is fully validated:

  1. Run the example test on the example test bench. This illustrates the components and processes required to validate a real system (see Using the example test bench, Using the BST, and The test program).

  2. Modify your ASIC test bench to add your system components (see Modifying your ASIC test bench).

  3. Modify the example test program for your ASIC environment (see Modifying the test program).

  4. Run your modified test program to validate the trace.

There are two parts to the process of validating the trace for an ETM integrated into an ASIC design:

You can achieve both of these by carrying out the following steps:

  1. Enable the ETM and run a program on the ARM processor.

  2. Capture the resulting trace on the trace port pins of the ASIC.

  3. Decompress the trace (see Trace script usage).

  4. Compare the decompressed output against the ARM instructions that are executed (see Trace script usage).

A valid trace output indicates that the ETM and the trace port are correctly wired.

Note

ARM has found that some versions of Perl have bugs that result in incorrect operation of the supplied scripts. ARM uses Perl version 5.005_004 and recommends that if any problems arise in the use of these scripts, then you must investigate possible Perl version incompatibilities as a first step.

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