3.4.2. Multiprocessor TAP structure

If you want your multiprocessor-compatible run control products, such as Multi-ICE, to work correctly when used with more than one ARM processor on a chip, ARM recommends that you connect the processors as a serial TAP structure. The presence of an ETM7 on any or all of the ARM processors does not affect this. The TAP structure for a dual-processor ARM processor system is shown in Figure 3.10.

Figure 3.10. Multiprocessor TAP structure


For clarity, nTRST is omitted from figures relating to the TAP interface. You must connect nTRST to all TAPs on the chip. See the Multi-ICE User Guide for details.

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