PrimeCell™ Color LCD Controller (PL110) Technical Reference ManualRevision: r1p2
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4.2. Summary of test registers

The PrimeCell CLCDC test registers are memory-mapped as shown in Table 4.1.

Table 4.1. CLCDC test register summary

Address

offset

Type

Width

Name

Description

0xF00

Read/write

1CLCDTCR

See Test Control Register, CLCDTCR

0xF04

Read/write

6CLCDITOP1

See Integration Test Output Register 1, CLCDITOP1

0xF08

Read/write

30CLCDITOP1

See Integration Test Output Register 2, CLCDITOP2

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