5.2.1. Committing write data to the write buffer

The write buffer may only be used when the following conditions are met:

See Register 1: Control register and About the ARM966E-S Memory Map for details on write buffer enable and the ARM966E-S fixed address map.

When a write is performed by the core that conforms to the above conditions, the address for the write is put into the first available entry of the write buffer FIFO. The next available entry is used for the write data. If the write is a store multiple (STM), subsequent entries get used for each word of the STM. It is therefore possible for the FIFO to contain eleven words of a STM where the first entry contains the address and the remaining eleven entries contain the write data.

Alternatively, if several shorter bufferable STM or single writes (STR) instructions are performed, one address entry is used for each write instruction. The worst case is that only six data words fill the FIFO caused by six STR writes. In this case the FIFO will hold six address entries and six data entries.

The Figure 5.1 shows an example where the BIU FIFO has been filled by the following write instructions.

STMIA r13!,{r2-r4}       ; store three registers to the stack
STRB 	 r5,[r6]            ; store byte
STMIA r13!,{r3-r4}       ; store two registers to the stack
STR	 r7,[r2]             ; single store

Figure 5.1. Write buffer FIFO content example

Copyright © 1999 ARM Limited. All rights reserved.ARM DDI 0164A
Non-Confidential