5.3.4. A940TWrapMast

In master mode, this block converts the pseudo-AHB accesses from A940TWrapSM into true AHB by adding support for split and retry responses, and also for HGRANTM. A split/retry response, or loss of HGRANTM, causes the affected access to be placed into a holding register for reconstruction when the access can recommence on the AHB. During this time, the pseudo-AHB access is simply waited using MREADY.

The holding registers store the current transfer on the pseudo-AHB on each valid cycle (qualified by MREADY). The AHB outputs are multiplexed based on the signal HoldSel. This is a registered signal, which is synchronously set and cleared by HoldSet and HoldClr respectively:

When reconstructing a burst after the use of the holding registers, to meet AHB protocol, the wrapper forces assertion of INCR on HBURSTM when the number of transfers remaining is unknown (for example, if only three transfers remain from an INCR4 burst). In cases where an entire INCR4 burst remains to be transferred (for example, when the core was not initially granted the AHB bus and so must wait in the holding state until HGRANTM is asserted), the burst size information is retained.

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