3.2. Summary of PrimeCell MCI registers

The PrimeCell MCI registers are shown in Table 3.1.

Table 3.1. PrimeCell MCI register summary

Address	Type	Width	Reset value	Name	Description
MCI Base + `0x000`	Read/write	8	`0x00`	MCIPower	Power control register.
MCI Base + `0x004`	Read/write	12	`0x000`	MCIClock	Clock control register.
MCI Base + `0x008`	Read/write	32	`0x00000000`	MCIArgument	Argument register.
MCI Base + `0x00C`	Read/write	11	`0x000`	MMCCommand	Command register.
MCI Base + `0x010`	Read only	6	`0x00`	MCIRespCmd	Response command register.
MCI Base + `0x014`	Read only	32	`0x00000000`	MCIResponse0	Response register.
MCI Base + `0x018`	Read only	32	`0x00000000`	MCIResponse1	Response register.
MCI Base + `0x01C`	Read only	32	`0x00000000`	MCIResponse2	Response register.
MCI Base + `0x020`	Read only	31	`0x00000000`	MCIResponse3	Response register.
MCI Base + `0x024`	Read/write	32	`0x00000000`	MCIDataTimer	Data timer.
MCI Base + `0x028`	Read/write	16	`0x0000`	MCIDataLength	Data length register.
MCI Base + `0x02C`	Read/write	8	`0x00`	MCIDataCtrl	Data control register.
MCI Base + `0x030`	Read only	16	`0x0000`	MCIDataCnt	Data counter.
MCI Base + `0x034`	Read only	22	`0x000000`	MCIStatus	Status register.
MCI Base + `0x038`	Write only	11	`-`	MCIClear	Clear register.
MCI Base + `0x03C`	Read/write	22	`0x000000`	MCIMask0	Interrupt 0 mask register.
MCI Base + `0x040`	Read/write	22	`0x000000`	MCIMask1	Interrupt 1 mask register.
MCI Base + `0x044`	Read/write	4	`0x0`	MCISelect	Secure digital memory card select register.
MCI Base + `0x048`	Read only	15	`0x0000`	MCIFifoCnt	FIFO counter.
MCI Base + `0x04C` - `0x07C`	-	-	-	Reserved	-
MCI Base + `0x080` - `0x0BC`	Read/write	32	`0x00000000`	MCIFIFO	Data FIFO register.
MCI Base + `0xFE0`	Read only	8	`0x80`	MCIPeriphID0	Peripheral identification register bits 7:0.
MCI Base + `0xFE4`	Read only	8	`0x11`	MCIPeriphID1	Peripheral identification register bits 15:8.
MCI Base + `0xFE8`	Read only	8	`0x04`	MCIPeriphID2	Peripheral identification register bits 23:16.
MCI Base + `0xFEC`	Read only	8	`0x00`	MCIPeriphID3	Peripheral identification register bits 31:24.
MCI Base + `0xFF0`	Read only	8	`0x0D`	MCIPCellID0	PrimeCell identification register bits 7:0.
MCI Base + `0xFF4`	Read only	8	`0xF0`	MCIPCellID1	PrimeCell identification register bits 15:8.
MCI Base + `0xFF8`	Read only	8	`0x05`	MCIPCellID2	PrimeCell identification register bits 23:16.
MCI Base + `0xFFC`	Read only	8	`0xB1`	MCIPCellID3	PrimeCell identification register bits 31:24.

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