2.1.2. Secure digital memory card system

Figure 2.2 shows the secure digital memory card system.

Figure 2.2. Secure digital memory card system

The secure digital memory card system consists of the host and cards connected in a star bus topology. The system host contains the secure digital card controller and a power supply.

Note

The power supply is not described in this document.

The secure digital memory card system is described in the following sections:

Note

Multimedia cards and secure digital memory cards can be used in the same system, as shown in Figure 2.2.

Secure digital memory card bus

The secure digital memory card bus is implemented using multiplexing logic, as shown in Figure 2.3. The secure digital memory card select register output (see Secure digital memory card select register, MCISelect) controls the output demultiplexers (1 to N) and the input multiplexers (N to 1).

Figure 2.3. Secure digital memory card bus implementation

The maximum number of cards that can be installed in a secure digital memory card system depends on the number of data ports on the secure digital card controller. The clock (CLK), power (Vdd), and ground (Vss) are common to all cards, while the command and data (DAT[3:0]) signals are dedicated to each card. After power-up, the secure digital cards only use DAT0 for data transfer. After initialization, the host can change the data bus width. If a multimedia card is connected to the secure digital card controller, only DAT0 is used for data transfer.

Secure digital memory card bus signals

The following signals are used on the secure digital memory card bus:

CLK: Host to card clock signal.
CMD: Bidirectional command/response signal (one per card).
DAT[3:0]: Bidirectional data signals (one per card).
Vdd, Vss1, Vss2: Power and ground signals.

Note

The PrimeCell MCI does not contain the bus multiplexing logic. You must implement this logic when you integrate the block in a system. The configuration depends on the number of ports required.

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