| Copyright © 2000 ARM Limited. All rights reserved. | ARM DDI 0176D |
| Non-Confidential | |
 PDF version | |
| Home > Functional Overview > About the SC054 ASB SMC > Timing control |
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The timing block contains a 6-bit counter that is used to generate:
wait states for read and write accesses
bus turnaround cycles between read and write transfers on the external data bus.
| Copyright © 2000 ARM Limited. All rights reserved. | ARM DDI 0176D |
| Non-Confidential | |
| PDF version | |
| Home > Functional Overview > About the SC054 ASB SMC > Timing control |