B.1.10. Vectored interrupt initialization

Example B.10 gives an example of the vectored interrupt initialization code.

Example B.10. Vectored interrupt initialization

       LDR    r0, =IntCntlBase
       MOV    r1, #<interrupt_to_enable>
       STR    r1, [r0, #IntEnableClearOffset]                ;  Disable interrupt
                                                                                                      
       LDR    r2, =default_vector_address                    ;  Set default vector address
       STR    r2, [r0, #DefaultVectorAddressOffset]          ;  Setup and enable vectored interrupt 15
       MOV    r2, #vector_address                            ;  Set vector address
       STR    r2, [r0, #VectorAddr15Offset]
       MOV    r2, #interrupt_source                          ;  Set interrupt source
       ORR    r2, r2, #0x20                                  ;  and enabled vector interrupt
       STR    r2, [r0, #VectorCntl15Offset]
       LDR    r2, [r0, #IntSelectOffset]                     ;  Select IRQ interrupt
       BIC    r2, r2, r1
       STR    r2, [r0, #IntSelectOffset]
       STR    r1, [r0, #IntEnableOffset]                     ;  Enable interrupt
       MRS    CPSR_c, #(DISABLE_IRQ + MODE_SYS_32)           ;  Enable FIQ interrupts
Copyright © 2000, 2003-2004 ARM Limited. All rights reserved.ARM DDI 0181E
Non-Confidential