PrimeCell® Vectored Interrupt Controller (PL190) Technical Reference ManualRevision: r1p2
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3.3.7. Software Interrupt Register

The read/write VICSOFTINT Register, with address offset of 0x018, generates software interrupts. Table 3.8 lists the bit assignments for this register.

Table 3.8. VICSOFTINT Register bit assignments

Bits

Name

Function

[31:0]

SoftInt

Setting a bit generates a software interrupt for the specific source interrupt before interrupt masking. A HIGH bit sets the corresponding bit in the VICSOFTINT Register. A LOW bit has no effect.

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