4.3.1. Test Control Register

The read/write VICITCR Register, with address offset of 0x300, is a single-bit test control register. The ITEN bit in this register controls the input test multiplexors. Figure 4.1shows the bit assignments for this register.

Figure 4.1. VICITCR Register bit assignments

Table 4.2 lists the bit assignments for this register.

Table 4.2. VICITCR Register bit assignments

Bits

Name

Description

[31:1]

-

Read undefined. Write as zero.

[0]

ITEN

Integration test enable:

0 = normal mode

1 = test mode.

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