ARM922T Technical Reference Manual 10.3. TrackingICE outputs

10.3. TrackingICE outputs

Table 10.1 shows the ARM922T outputs that are re-used when the ARM922T processor is in TrackingICE mode.

Table 10.1. ARM922T in TrackingICE mode

ARM922T output	Attach to tracking ARM9TDMI input
IR[3:2]	CHSE[1:0]
IR[1:0]	CHSD[1:0]
SCREG[4]	nIRQ
SCREG[3]	nFIQ
SCREG[2]	DABORT
SCREG[1]	IABORT
TAPSM[3]	EXTERN1
TAPSM[2]	EXTERN0
TAPSM[1]	DEWPT
TAPSM[0]	IEBKPT
ICAPCLKBS	HIVECS
ECAPCLKBS	EDBGGQ
PCLKBS	nWAIT
RSTCLKBS	nRESET
SHCLK1BS	TDI
SHCLK2BS	TMS
TCK1	GCLK
TCK2	TCK
SDIN	SDOUTBS

The remaining input connections to the ARM9TDMI core are:

ID bus attaches to the CPID bus
DD bus attaches to the CPDOUT bus
BIGEND input attaches to the BIGENDOUT.

These can still be attached to a coprocessor when the ARM922T is in tracking mode. The only difference in behavior is that CPDOUT mirrors the ARM922T DD bus on every cycle, not only for coprocessor data transfers. The following conditions apply:

The ISYNC and nTRST inputs must be common between the ARM922T and the tracking ARM9TDMI.
IABE and DABE of the tracking ARM9TDMI must be HIGH so that the address outputs can be observed.
DDBE of the tracking ARM9TDMI must be LOW to prevent a drive clash on the bidirectional DD bus. It is not necessary for the tracking ARM9TDMI to drive the DD bus because CPDOUT is driven with the data from all memory access cycles.

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