ARM922T Technical Reference Manual(Rev 0)
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2.3.12. Register 8, TLB operations register

Register 8 is a write-only register used to manage the Translation Lookaside Buffers (TLBs), the instruction TLB, and the data TLB.

Five TLB operations are defined and you can select the function to be performed with the opcode_2 and CRm fields in the MCR instruction used to write CP15 register 8. Writing other opcode_2 or CRm values is unpredictable. Reading from CP15 register 8 is unpredictable.

Table 2.17 shows instructions that you can use to perform TLB operations using register 8.

Table 2.17. TLB operations register 8

Function

Data

Instruction

Invalidate TLB(s)

SBZ

MCR p15,0,Rd,c8,c7,0

Invalidate I TLB

SBZ

MCR p15,0,Rd,c8,c5,0

Invalidate I TLB single entry (using MVA)

MVA format

MCR p15,0,Rd,c8,c5,1

Invalidate D TLB

SBZ

MCR p15,0,Rd,c8,c6,0

Invalidate D TLB single entry (using MVA)

MVA format

MCR p15,0,Rd,c8,c6,1

Note

These functions invalidate all the unpreserved entries in the TLB. Invalidate TLB single entry functions invalidate any TLB entry corresponding to the MVA given in Rd, regardless of its preserved state. See Register 10, TLB lockdown register.

Figure 2.6 shows the MVA format used for operations on single entry TLB lines using register 8.

Figure 2.6. Register 8 MVA format

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