B.2.10. Bit 1, D miss abort

When DTLB page table walks are disabled, the DTLB miss causes a Data Abort and indicates a translation fault in the DFSR. The Data Abort handler then has to use a CP15 MCR instruction to write a page table entry to the data TLB.It is a requirement that the DCache and MMU is enabled when you disable hardware page table walks, otherwise the behavior is unpredictable.

Copyright © 2000, 2001 ARM Limited. All rights reserved.ARM DDI 0184B