The index pointer to the RAM2 array is a pipelined version of the CAM and RAM1 index pointer. This means that to read from index n in the RAM2 array, you must first perform an access to index n in either the CAM or RAM1. Because of this, the composite location RAM1, RAM2 at address 0x30, and the Burst-128 location at address 0x1C0 are supported.