Read this chapter for an introduction to the ARM922T.

Read this chapter for a description of the programmer’s model for the ARM922T.

Read this chapter for a description of the memory management unit and the memory interface, including descriptions of the instruction and data interfaces.

Read this chapter for descriptions of cache, write buffer, and PA TAG RAM operation.

Read this chapter for a description of the processor clock modes.

Read this chapter for a description of the bus interface unit and the AMBA ASB and AHB interface.

Read this chapter for a description of the ARM922T coprocessor interface.

Read this chapter for a description of the Trace Interface Port of the ARM922T.

Read this chapter for a description of the debug interface.

Read this chapter for a description of how the ARM922T uses TrackingICE mode.

Read this chapter for a description of the AMBA test interface.

Read this chapter for details of instruction cycle times. This chapter contains timing diagrams for interlock timing.

Read this chapter for a description of the timing parameters used in the ARM922T.

Read this chapter for a detailed description of the signals used in the ARM922T.

Read this chapter for a detailed description of the CP15 test register used in the ARM922T.