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You can partition the address space into a maximum of eight regions. Each region is specified by the following:
region base address
region size
cache and write buffer configuration
read and write access permissions.
The ARM architecture uses constants known as inline literals to perform address calculations. These constants are automatically generated by the assembler and compiler and are stored inline with the instruction code. To ensure correct operation, you must define an area of memory, from where code is to be executed, that enables both data and instruction accesses.
The base address and size properties are programmed using CP15 register 6. Table 4.1 shows the format.