2.1. About the ARM946E-S programmer’s model

The programmer’s model for the ARM946E-S processor primarily consists of the ARM9E-S core programmer’s model (see About the ARM9E-S programmer’s model). Additions to this model are required to control the operation of the ARM946E-S internal coprocessors, and any coprocessor connected to the external coprocessor interface.

There are two internal coprocessors within the ARM946E-S processor:

The registers defined in CP14 are accessible with MCR and MRC instructions, and are described in The debug communication channel.

The registers defined in CP15 are accessible with MCR and MRC instructions, and are described in CP15 register map summary. These instructions permit conditional access using the optional {cond} field.

Registers and operations provided by any coprocessors attached to the external coprocessor interface are accessible with appropriate coprocessor instructions.

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