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The Coprocessor Data Processing (CDP)
instruction is used for coprocessor instructions that do not operate
on values in ARM registers or in main memory. One example is a floating-point
multiply instruction for a floating-point accelerator processor.
To enable coprocessors to continue execution of CDP instructions
while the ARM9E-S core pipeline is stalled (for instance while waiting
for an AHB transfer to complete), the coprocessor receives the free-running
system clock CLK, and a clock
enable signal CPCLKEN. If CPCLKEN is LOW around the rising edge
of CLK then the ARM9E-S core
pipeline is stalled and the coprocessor pipeline follower must not
advance.
This prevents any new instructions entering Execute within
the coprocessor but enables a CDP instruction
in Execute to continue execution. The coprocessor is only stalled
when the current instruction leaves Execute and new instructions
are required from the ARM946E-S interface.This goes some way towards
decoupling the external coprocessor from the ARM9E-S memory interface.
There are three classes of coprocessor instructions:
LDC/STC
MCR/MRC
CDP.
Examples of how a coprocessor executes these instruction classes are given in the following sections: