This scheme is recommended for high-speed systems where the switching frequency of the off-chip trace signals is unacceptable.

Figure 3.9 shows the timing for the demultiplexed trace port with normal clocking.

Figure 3.10 displays the timing for the demultiplexed trace port with half-rate clocking.

In demultiplexed mode, the TPA must examine the trace port A and trace port B in parallel to determine whether a trigger has occurred. It must also check for the TD (Trace Disabled) pipeline status in trace port A and trace port B.