When modifying ETM10 registers, you must set the programming bit in the ETM control register (0x00) before making any further modifications. When all register updates are complete, you must clear the programming bit. While the programming bit is set, all ETM operations are disabled.

The setting and clearing of the programming bit is necessary for proper synchronization between the CLK and TCK clock domains. You do not have to set the programing bit to read ETM registers.

The ETM control register and all the other ETM registers are described in the Embedded Trace Macrocell Specification.