ARM10 has an independent load/store unit. This means that it is capable of continuing to transfer data values for an earlier instruction after later instructions have been executed. In these circumstances, the later instructions are said to have executed underneath the data instruction. Once a data instruction has been traced, all instructions executed underneath it are also traced.

All address comparators have a sticky bit that is observed when the comparator is used as shown in Table 5.2.

Where it is observed, the sticky bit behaves as follows:

The sticky bit is never set for address comparators configured for data addresses.

Where observed, the comparator continues to match while the sticky bit is set.

Single address comparators cannot observe the sticky bit when selected as an event, because they are defined to be active for only one cycle for the benefit of the counters and sequencer. If an event of the kind instruction address = X AND data address = Y is required, the instruction address comparator must be an address range comparator to guarantee that it will still match when the data address comparator matches.

ViewData always observes the sticky bits so that if an instruction address comparator is selected, all the data corresponding to that instruction will match. In normal circumstances, you must not use single instruction address comparators as the enabling event, because they do not observe the sticky bit.

There is no need for TraceEnable or the start/stop block to observe the sticky bit, because when a data instruction has been traced, tracing cannot be disabled until all data transfers corresponding to that instruction have occurred.