The queue FIFOs are implemented as three registers, with the current output selected by using multiplexors. Figure 11.4 shows this arrangement.

The queue consists of three registers, each of which is associated with a flag that indicates if the register contains valid data. New data are moved into the queue by being written into buffer A and continue to move along the queue if the next register is empty, or is about to become empty. If the queue is full, the oldest data, and therefore the first to be read from the queue, occupies buffer C and the newest occupies buffer A.

The multiplexors also select the current flag, which then indicates if the selected output is valid.