16.17. SWI, BKPT, Undefined, and Prefetch
Aborted instructions
This section describes the cycle timing behavior for SWI,
Undefined instruction, BKPT and Prefetch Abort.
In all cases the exception is taken in the WBex stage of the
pipeline. SWI and most Undefined instructions that fail their condition
codes take one cycle. A small number of Undefined instructions that
fail their condition codes take two cycles. Table 16.23 shows the SWI, BKPT, Undefined, Prefetch
Aborted instructions cycle timing behavior.
Table 16.23. SWI, BKPT, Undefined, Prefetch Aborted instructions cycle
timing behavior
| Instruction | Cycles |
|---|
| SWI | 8 |
| BKPT | 8 |
| Prefetch Abort | 8 |
| Undefined instruction | 8 |
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