| |||
| Home > System Control Coprocessor > System control processor register descriptions > c9, Instruction TCM Region Register | |||
The purpose of the Instruction TCM Region Register is to describe the physical base address and size of the Instruction TCM region and to provide a mechanism to enable it.
The Instruction TCM Region Register is:
in CP15 c9
a 32-bit read/write register
accessible in privileged mode only.
ARM1136JF-S processors have a single TCM on each side, Data and Instruction. See c9, Data TCM Region Register for details of configuring the Data TCM region.
Figure 3.47 shows the arrangement of bits in the Instruction TCM Region Register.
Table 3.96 shows the bit functions of the Instruction TCM Region Register.
Table 3.96. Instruction TCM Region Register bit functions
Bit range | Field name | Function |
|---|---|---|
[31:12] | Base address | The physical base address of the TCM. The base address must be aligned to the size of the TCM. Any bits in the range [(log2(RAMSize)-1):12] are ignored. The base address is 0 at Reset. |
| [11:7] | - | UNP/SBZ. |
| [6:2] | Size | On reads, the Size field indicates the size of the TCM, see Table 3.97.[1] |
| [1] | SC | Indicates if the TCM is enabled as SmartCache: 0 = Local RAM. This is the reset value. 1 = SmartCache. |
[0] | En | The En bit indicates if the TCM is enabled: 0 = TCM disabled. This is the reset value. 1 = TCM enabled. On reset, the value of the TCM enable bit is determined by the pin INITRAM:
|
[1] On writes this field is ignored. For more details see Tightly-coupled memory. [2] When INITRAM is HIGH the Instruction TCM is enabled directly from reset, with a Base address of 0x00000. When the processor comes out of reset, it executes the instructions in the Instruction TCM instead of fetching instructions from external memory, except when the processor uses high vectors. | ||
Table 3.97 shows the Size field encoding value for each memory size. All other values are reserved.
Table 3.97. Size field encoding for Instruction TCM Region Register
| Size field | Memory size |
|---|---|
| b00000 | 0KB |
| b00011 | 4KB |
| b00100 | 8KB |
| b00101 | 16KB |
| b00110 | 32KB |
| b00111 | 64KB |
Table 3.98 shows the results of attempted accesses to the Instruction TCM Region Register for each mode.
Table 3.98. Results of accesses to the Instruction TCM Region Register
| Privileged read | Privileged write | User read or write |
|---|---|---|
| Data read | Data write | Undefined exception |
To access the Instruction TCM Region Register you read or write CP15 with:
Opcode_1 set to 0
CRn set to c9
CRm set to c1
Opcode_2 set to 1.
For example:
MRC p15, 0, <Rd>, c9, c1, 1 ; Read Instruction TCM Region Register
MCR p15, 0, <Rd>, c9, c1, 1 ; Write Instruction TCM Region Register
Changing the Instruction TCM Region Register while a Prefetch Range or DMA operation is running has Unpredictable effects.